[148552] in cryptography@c2.net mail archive
Re: [Cryptography] [IP] 'We cannot trust' Intel and Via's
daemon@ATHENA.MIT.EDU (Jerry Leichter)
Sat Dec 21 16:57:45 2013
X-Original-To: cryptography@metzdowd.com
From: Jerry Leichter <leichter@lrw.com>
In-Reply-To: <CAMm+LwgwTpWsnPkzbnkZRDySc7hb51WccFA+arRp1AYnPXNvWA@mail.gmail.com>
Date: Fri, 20 Dec 2013 18:48:49 -0500
To: Phillip Hallam-Baker <hallam@gmail.com>
Cc: John Kelsey <crypto.jmk@gmail.com>, Theodore Ts'o <tytso@mit.edu>,
"cryptography@metzdowd.com" <cryptography@metzdowd.com>,
ianG <iang@iang.org>
Errors-To: cryptography-bounces+crypto.discuss=bloom-picayune.mit.edu@metzdowd.com
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On Dec 19, 2013, at 5:39 PM, Phillip Hallam-Baker <hallam@gmail.com> =
wrote:
Off topic, but:
> Some chips have microcode on microcode. The DEC Alpha even let the =
operating system write instructions into the microcode (this allowed the =
chip to emulate the VAX four ring security system).
Alpha's were not microcoded. The standard instructions were all =
implemented RISC-style. What the Alpha had was a special privileged =
"PALcode" mode with complete access to the hardware. It ran the same =
instruction set as "normal" code, though it had special instructions to =
get at model-specific features (hardware control registers, a mechanism =
to save and restore the non-PALcode state of the machine, etc.)
PALcode managed TLB refill, so it defined how the page tables worked - =
the hardware itself could only access pages for which there were active =
TLB entries. It also implemented process context switching and the flow =
during interrupt/exception handling - including for "illegal" =
instructions, so PALcode could implement what looked to the software =
like instructions. (This idea, of course, goes way, way back - and, =
yes, this kind of looks like a microcoded instruction.) In practice, =
there was a reserved op code (CALL_PAL - instruction code 0) that was =
used for PALcode instructions. Yes, the PALcode implemented four access =
rings for VMS (and two for OSF/1), but that's a matter of controlling =
TLB's and deciding what to do with "privileged" PALcode calls: All the =
hardware-defined instructions were non-privileged.
OS's didn't, as far as I know, load PALcode. Rather, the PALcode needed =
to support a particular OS was loaded before the OS was loaded. PALcode =
*could* provide a way for an OS to change the code later, but I don't =
think any standard variant did. (Keep in mind that even the OS couldn't =
touch the perfectly ordinary system memory where the PALcode resided =
unless the PALcode consented to fill a TLB entry to map that memory - =
which I very much doubt the standard PALcode would ever do.)
-- Jerry
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